plumiAstables: AQA A‑Level Physics questions
AQA A-Level Physics past-paper questions on 3.13.5.3 Astables, 2008–2025, with mark schemes and examiner’s reports where available.
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Q02.1
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All 10 questions on Astables, as a list
- June 2025, Paper 3 Electronics, Q02.1 (1 mark): Explain the combined role of the 33 kΩ resistor and C in this circuit. [1 mark]
- June 2025, Paper 3 Electronics, Q02.4 (2 marks): Figure 6 shows the output from a different oscillator displayed on an oscilloscope screen. Figure 6 The time-base is 10 μs per division. Deduce the pulse rate f
- June 2022, Paper 3 Electronics, Q04.1 (3 marks): Initially the capacitor is uncharged and Vc is at 0 V. Explain the sequence of actions of this circuit as the output goes through one full cycle. The first two
- June 2022, Paper 3 Electronics, Q04.2 (4 marks): Figure 7 shows the oscillator circuit after it has been modified by the addition of: • two diodes D1 and D2 • a potential divider that has a total resistance va
- November 2021, Paper 3 Electronics, Q04.2 (3 marks): An astable oscillator produces a continuous train of pulses. Figure 13 shows the display of the pulses on an oscilloscope. Figure 13 The oscilloscope settings a
- June 2018, Paper 3 Electronics, Q04.1 (1 mark): Figure 6 shows an astable circuit based on a NOT logic gate. The symbol in the centre of the logic gate means that the output Vo changes at two different input
- June 2018, Paper 3 Electronics, Q04.2 (1 mark): The supply voltage to the NOT gate is Vs • When Vc increases and reaches the upper switching threshold (UST), the output of the NOT gate will switch from Vs to
- June 2018, Paper 3 Electronics, Q04.3 (2 marks): The circuit in Figure 6 can be modified by the addition of a resistor to vary the PRF. The astable is to be modified so that it produces a frequency 4 times tha
- June 2018, Paper 3 Electronics, Q04.4 (2 marks): In another astable, two resistors (R1 and R2) and a capacitor C form a timing chain to control the mark and space times for a square wave produced at the output
- June 2018, Paper 3 Electronics, Q04.5 (2 marks): The output of the IC in Figure 8 is 5 V during the charging period and 0 V during the discharging period. Draw on Figure 9 the wave pattern that represents this
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